Skip to content
Category

SPARC microprocessors

page 1
OpenSPARC
OpenSPARC is an open-source hardware project, started in December 2005, for CPUs implementing the SPARC instruction architecture. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32-thread microprocessor, the UltraSPARC T1 processor. On March 21, 2006, Sun released the source code to the T1 IP core under the GNU General Public License v2. The full OpenSPARC T1 system consists of 8 cores, each one capable of executing four threads concurrently, for a total of 32 threads. Each core executes instruction in order and its lo
UltraSPARC
The UltraSPARC is a microprocessor developed by Sun Microsystems and fabricated by Texas Instruments, introduced in mid-1995. It is the first microprocessor from Sun to implement the 64-bit SPARC V9 instruction set architecture (ISA). Marc Tremblay was a co-microarchitect.
UltraSPARC T2
Sun Microsystem microprocessor
UltraSPARC T1
microprocessor by Sun Microsystems
LEON
LEON (from meaning lion) is a radiation-tolerant 32-bit central processing unit (CPU) microprocessor core that implements the SPARC V8 instruction set architecture (ISA) developed by Sun Microsystems. It was originally designed by the European Space Research and Technology Centre (ESTEC), part of the European Space Agency (ESA), without any involvement by Sun. Later versions have been designed by Gaisler Research, under a variety of owners. It is described in synthesizable VHSIC Hardware Description Language (VHDL). LEON has a dual license model: A GNU Lesser General Public License (LGPL) and
UltraSPARC II
microprocessor developed by Sun Microsystems
UltraSPARC III
microprocessor developed by Sun Microsystems
hyperSPARC
The hyperSPARC, code-named "Pinnacle", is a microprocessor that implements the SPARC Version 8 instruction set architecture (ISA) developed by Ross Technology for Cypress Semiconductor.
ERC32
ERC32 is a radiation-tolerant 32-bit RISC processor (SPARC V7 specification) developed for space applications. It was developed by Temic, which was later acquired by Atmel, and then Microchip.
S1 Core
SuperSPARC
The SuperSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Sun Microsystems. 33 and 40 MHz versions were introduced in 1992. The SuperSPARC contains 3.1 million transistors. It was fabricated by Texas Instruments (TI) at Miho, Japan in a 0.8 micrometre triple-metal BiCMOS process.
SPARC64 V
microprocessor developed by Fujitsu
microSPARC
The microSPARC (code-named Tsunami) is a discontinued microprocessor implementing the SPARC V8 instruction set architecture (ISA), developed by Sun Microsystems. It is a low-end microprocessor intended for low-end workstations and embedded systems. The microprocessor was developed by Sun, but the floating-point unit (FPU) was licensed from Meiko Scientific. It contains 800,000 transistors. It was used in the SPARCclassic and SPARCstation LX among others.
SPARC T4
microprocessor introduced by Oracle Microelectronics in 2011
SPARC T3
microprocessor also known as "Rainbow Falls"
UltraSPARC IV
microprocessor developed by Sun Microsystems
SPARC64
processor
FeiTeng
FeiTeng (飞腾, fēiténg) is the name of several computer central processing units designed and produced in China for supercomputing applications. The microprocessors have been developed by Tianjin Phytium Technology. The processors have also been described as the YinHeFeiTeng (银河飞騰, YHFT) family. This CPU family has been developed by a team directed by NUDT's Professor Xing Zuocheng.
Rock
processor
TurboSPARC
The TurboSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Fujitsu Microelectronics, Inc. (FMI), the United States subsidiary of the Japanese multinational information technology equipment and services company Fujitsu Limited located in San Jose, California. It was a low-end microprocessor primarily developed as an upgrade for the Sun Microsystems microSPARC-II-based SPARCstation 5 workstation. It was introduced on 30 September 1996, with a 170 MHz version priced at US$499 in quantities of 1,000. The TurboSPARC was mostly succeeded in t
MB86900
The MB86900 is a microprocessor produced by Fujitsu, which implements the SPARC V7 instruction set architecture developed by Sun Microsystems. It was the first implementation of SPARC, introduced in 1986, and was used in the first SPARC-based workstation, the Sun Microsystems Sun-4, from 1987. Its chipset operated at 16.67 MHz. The chipset consisted of two chips, the MB86900 microprocessor and the MB86910 floating-point controller. The chip set was implemented with two 20,000-gate, 1.2 μm complementary metal–oxide–semiconductor (CMOS) gate-arrays fabricated by Fujitsu Lim