Category
page 1Transactional memory
Blue Gene
series of supercomputers by IBM
Haswell
Intel processor microarchitecture
Skylake
Intel processor microarchitecture
Broadwell
Intel processor family
Kaby Lake
Intel processor family
Coffee Lake
Intel processor family
IBM Z
family name used by IBM for its non-POWER mainframe computers from the Z900 on
Ice Lake
Intel processor family

Tiger Lake
Intel processor family
Cannonlake
Intel processor family
POWER9
POWER9 is a family of superscalar, multithreading, multi-core microprocessors produced by IBM, based on the Power ISA. It was announced in August 2016. The POWER9-based processors are being manufactured using a 14 nm FinFET process, in 12- and 24-core versions, for scale out and scale up applications, and possibly other variations, since the POWER9 architecture is open for licensing and modification by the OpenPOWER Foundation members.
transactional memory
concurrency control mechanism, analogous to database transactions for controlling access to shared memory in concurrent computing, that simplifies concurrent programming by allowing a group of load and store instructions to execute in an atomic way
Cooper Lake
Intel microprocessor, released in 2020
software transactional memory
concurrency control mechanism for controlling access to shared memory in concurrent computing
Load-link/store-conditional
In computer science, load-linked/store-conditional (LL/SC), sometimes known as load-reserved/store-conditional (LR/SC), are a pair of instructions used in multithreading to achieve synchronization. Load-link returns the current value of a memory location, while a subsequent store-conditional to the same memory location will store a new value only if no updates have occurred to that location since the load-link. Together, this implements a lock-free, atomic, read-modify-write operation.
POWER8
thumb|upright=1.6|IBM Power E870 can be configured with up to 80 POWER8 cores and 8 TB of RAM.
Cascade Lake
Intel processor family
Rock
processor