组合逻辑电路

Combinational Logic • Logic circuits for digital systems may be combinational or sequential. • A combinational circuit consists of input variables, logic gates, and output variables. Design Procedure: 1. The problem is stated 2. The number of available input variables and required output variables is determined. 3. The input and output variables are assigned letter symbols. 4. The truth table that defines the required relationship between inputs and outputs is derived. 5. The simplified Boolean function for each output is obtained. 6. The logic diagram is drawn. Imtiaz Ahammad A. Adders: In electronics, an adder or summer is a digital circuit that performs addition of numbers. In modern computers adders reside in the arithmetic logic unit (ALU) where other operations are performed. Although adders can be constructed for many numerical representations, such as Binary-coded decimal or excess-3, the most common adders operate on binary numbers. In cases where twos complement or one’s complement is being used to represent negative numbers; it is trivial to modify an adder into an adder-subtractor. Other signed number representations require a more complex adder. Digital computers perform variety of information processing tasks, the one is arithmetic operations. And the most basic arithmetic operation is the addition of two binary digits. i.e, 4 basic possible operations are: The first three operations produce a sum whose length is one digit, but when augends and addend bits are equal to 1, the binary sum consists of two digits. The higher significant bit of this result is called a carry. A combinational circuit that performs the addition of two bits is called a half- adder. One that performs the addition of 3 bits (two significant bits & previous carry) is called a full adder & two half adder can employ as a full-adder. A Half Adder is a combinational circuit with two binary inputs (augends and addend bits and two binary outputs (sum and carry bits.) It adds the two inputs (A and B) and produces the sum (S) and the carry (C) bits. It is an arithmetic operation of addition of two single bit words. A Full-adder is a combinational circuit that adds two bits and a carry and outputs a sum bit and a carry bit. To add two binary numbers, each having two or more bits, the LSBs can be added by using a half-adder. The carry resulted from the addition of the LSBs is carried over to the next significant column and added to the two bits in that column. So, in the second and higher columns, the two data bits of that column and the carry bit generated from the addition in the previous column need to be added. The full-adder adds the bits A and B and the carry from the previous column called the carry-in (Cin) and outputs the sum bit (S) and the carry bit called the carry-out (Cout). The variable S gives the value of the least significant bit of the sum. The variable Cout gives the output carry. The eight rows under the input variables designate all possible combinations of 1s and 0s that these variables may have. The 1s and 0s for the output variables are determined from the arithmetic sum of the input bits. When all the bits are 0s, the output is 0. The S output is equal to 1 when only 1 input is equal to 1 or when all the inputs are equal to 1. The Cout has a carry of 1 if two or three inputs are equal to 1. The sum term of the full-adder is the X-OR of A, B and Cin, i.e, the sum bit the modulo sum of the data bits in that column and the carry from the previous column. The logic diagram of the full-adder using two X-OR gates and two AND gates (i.e, two half adders) and one OR gate is The Full-adder neither can also be realized using universal logic, i.e., either only NAND gates or only NOR gates as - For the time being, we considered second approach. The block diagram of 4-bit binary adder is shown in the following figure. Here, the 4 Full adders are cascaded. Each Full adder is getting the respective bits of two parallel i