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PowerPC

thumb|IBM PowerPC 601 microprocessor

Key facts

CPU architecture.name: PowerPC
CPU architecture.designer: AIM
CPU architecture.bits: 32-bit/64-bit (32 → 64)
CPU architecture.version: 2.02
CPU architecture.design: RISC
CPU architecture.type: Load–store
CPU architecture.encoding: Fixed/Variable (Book E)
CPU architecture.branching: Condition code
CPU architecture.endianness: Big/Bi
CPU architecture.extensions: AltiVec, PowerPC AS, APU
CPU architecture.gpr: 32
CPU architecture.fpr: 32
CPU architecture.vpr: 32 (with AltiVec)
CPU architecture.image: PowerPC logo.svg
CPU architecture.successor: Power ISA

via Wikipedia infobox

Article

20 sections

Contents

History
Apple and Motorola involvement
Operating systems
Breakup of AIM
Generations
Design features
Implementations
Operating systems
Native
Embedded
Licensees
32-bit PowerPC
64-bit PowerPC
Game consoles / Arcade system boards
Desktop computers
Embedded applications
See also
References
Further reading
External links

thumb|IBM PowerPC 601 microprocessor

PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has been named Power ISA since 2006, while the old name lives on as a trademark for some implementations of Power Architecture–based processors.