Key facts
- CPU architecture.name
- PowerPC
- CPU architecture.designer
- AIM
- CPU architecture.bits
- 32-bit/64-bit (32 → 64)
- CPU architecture.version
- 2.02
- CPU architecture.design
- RISC
- CPU architecture.type
- Load–store
- CPU architecture.encoding
- Fixed/Variable (Book E)
- CPU architecture.branching
- Condition code
- CPU architecture.endianness
- Big/Bi
- CPU architecture.extensions
- AltiVec, PowerPC AS, APU
- CPU architecture.gpr
- 32
- CPU architecture.fpr
- 32
- CPU architecture.vpr
- 32 (with AltiVec)
- CPU architecture.image
- PowerPC logo.svg
- CPU architecture.successor
- Power ISA
via Wikipedia infobox
Wikidata facts
- Instance of
- load/store architecture
- Subclass of
- central processing unit
- Developer
- AIM alliance
- Designed by
- AIM alliance
- Image
- IBM PowerPC601 PPC601FD-080-2 top.jpg
Show 6 more facts
- Stack Exchange tag
- stackoverflow.com/tags/powerpc
- Commons category
- PowerPC
- start time
- 1992-00-00
- software version identifier
- 2.02
- ACM Classification Code (2012)
- 10011517
- edition or translation of
- Cell
via Wikidata · CC0