VHDL-AMS
Sign in to saveVHDL-AMS is a derivative of the hardware description language VHDL (IEEE 1076-2002). It includes analog and mixed-signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems (IEEE 1076.1-2017).
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Encyclopedic overview
4 sectionsContents
- Code example
- VHDL-AMS Simulators
- References
- See also
VHDL-AMS is a derivative of the hardware description language VHDL (IEEE 1076-2002). It includes analog and mixed-signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems (IEEE 1076.1-2017).
The VHDL-AMS standard was created with the intent of enabling designers of analog and mixed signal systems and integrated circuits to create and use modules that encapsulate high-level behavioral descriptions as well as structural descriptions of systems and components.
Excerpted from Wikipedia’s “VHDL-AMS” article, available under the CC BY-SA 4.0 licence.